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| 2N7002F TrenchMOSTM Logic Level FET Rev. 01 -- 11 February 2002 M3D088 Product data 1. Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOSTM1 technology. Product availability: 2N7002F in SOT23. 2. Features s s s s TrenchMOSTM technology Very fast switching Logic level compatible Subminiature surface mount package. 3. Applications s Relay driver s High speed line driver s Logic level translator. 4. Pinning information Table 1: Pin 1 2 3 Pinning - SOT23, simplified outline and symbol Description gate (g) source (s) drain (d) g 03ab44 Simplified outline 3 Symbol d 1 2 s 03ab30 SOT23 1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V. Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 5. Quick reference data Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tj = 25 to 150 C Tsp = 25 C; VGS = 10 V Tsp = 25 C VGS = 10 V; ID = 500 mA; Tj = 25 VGS = 4.5 V; ID = 75 mA; Tj = 25 Typ 1.7 2.25 Max 60 475 0.83 150 2 4 Unit V mA W C drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS VGSM ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) peak gate-source voltage drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature source (diode forward) current (DC) Tsp = 25 C peak source (diode forward) current Tsp = 25 C; pulsed; tp 10 s tp 50 s; pulsed; duty cycle = 25% Tsp = 25 C; VGS = 10 V; Figure 2 and 3 Tsp = 100 C; VGS = 10 V; Figure 2 Tsp = 25 C; pulsed; tp 10 s; Figure 3 Tsp = 25 C; Figure 1 Conditions Tj = 25 to 150 C Tj = 25 to 150 C; RGS = 20 k Min -65 -65 Max 60 60 30 40 475 300 1.9 0.83 +150 +150 475 1.9 Unit V V V V mA mA A W C C mA A Source-drain diode 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 2 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 03aa17 120 Pder (%) 80 03aa25 120 Ider (%) 80 40 40 0 0 50 100 150 Tsp ( C) o 0 200 0 50 100 150 Tsp ( C) o 200 P tot P der = ---------------------- x 100% P tot ( 25 C ) VGS 4.5 V ID I der = ------------------- x 100% I D ( 25 C ) Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Normalized continuous drain current as a function of solder point temperature. 10 03ai11 ID (A) RDSon = VDS / ID 1 tp = 10 ms 100 ms 1 ms 10-1 10 ms DC 100 ms 10-2 1 10 VDS (V) 102 Tsp = 25 C; IDM is single pulse; VGS = 10 V. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 3 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 7. Thermal characteristics Table 4: Rth(j-sp) Rth(j-a) Thermal characteristics Conditions mounted on a printed circuit board; minimum footprint Min Typ Max Unit 150 K/W 350 K/W thermal resistance from junction to solder point mounted on a metal clad board; Figure 4 thermal resistance from junction to ambient Symbol Parameter 7.1 Transient thermal impedance 103 Zth(j-sp) K/W 102 = 0.5 0.2 0.1 10 0.05 0.02 P 03ai09 = tp T 1 single pulse tp T t 10-1 10-5 10-4 10-3 10-2 10-1 1 tp (s) 10 Mounted on metal clad substrate. Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration. 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 4 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 8. Characteristics Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage ID = 10 A; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 150 C Tj = -55 C IDSS drain-source leakage current VDS = 48 V; VGS = 0 V Tj = 25 C Tj = 150 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 15 V; VDS = 0 V VGS = 10 V; ID = 500 mA; Figure 7 and 8 Tj = 25 C Tj = 150 C VGS = 4.5 V; ID = 75 mA; Figure 7 and 8 Tj = 25 C Dynamic characteristics gfs Ciss Coss Crss ton toff VSD trr Qr forward transconductance input capacitance output capacitance reverse transfer capacitance turn-on time turn-off time VDD = 50 V; RD = 250 ; VGS = 10 V; RG = 50 ; RGS = 50 VDS = 10 V; ID = 200 mA VGS = 0 V; VDS = 10 V; f = 1 MHz; Figure 11 100 300 25 18 7.5 3 12 0.85 30 30 40 30 10 10 15 1.5 mS pF pF pF ns ns V ns nC 2.25 4 1.7 2 3.7 0.01 10 1.0 10 100 A A nA 1 0.6 2 3.5 V V V 60 55 75 V V Conditions Min Typ Max Unit Source-drain diode source-drain (diode forward) voltage IS = 300 mA; VGS = 0 V; Figure 12 reverse recovery time recovered charge IS = 300 mA; dIS/dt = -100 A/s; VGS = 0 V; VDS = 25 V 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 5 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 1 ID (A) 0.8 03ai13 Tj = 25 C o 10 V 7 V 6 V 5V 4.5 V 0.8 ID (A) 0.6 Tj = 25 C o 03ai16 VDS > ID X RDSon 150 C o 0.6 4V 0.4 0.4 3.5 V 0.2 0.2 3V VGS = 2.5 V 0 0 0.8 1.6 VDS (V) 2.4 0 0 2 4 VGS (V) 6 Tj = 25 C. Tj = 25 C and 150 C; VDS > ID x RDSon. Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values. 4 RDSon () 3 VGS = 3.5 V 4V 4.5 V 5V 03ai15 2.4 a 1.8 !== & Tj = 25 C o 6V 2 7V 10 V 1.2 1 0.6 0 0 0.2 0.4 0.6 0.8 ID (A) 1 0 -60 0 60 120 Tj ( C) o 180 Tj = 25 C. R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. Fig 7. Drain-source on-state resistance as a function of drain current; typical values. 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 6 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 2.4 VGS(th) (V) 1.8 typ !==!" 10-1 ID (A) 10-2 !==!% 10-3 min 1.2 min 10-4 typ 0.6 10-5 0 -60 0 60 120 Tj ( C) o 10-6 180 0 0.6 1.2 1.8 VGS (V) 2.4 ID = 1 mA; VDS = VGS. Tj = 25 C; VDS = 5 V. Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 102 03ai18 0.8 IS (A) VGS = 0 V 03ai17 C (pF) Ciss 0.6 10 Coss 0.4 0.2 Crss 150 C o Tj = 25 C o 1 10-1 1 10 VDS (V) 102 0 0 0.4 0.8 VSD (V) 1.2 VGS = 0 V; f = 1 MHz. Tj = 25 C and 150 C; VGS = 0 V. Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 7 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 9. Package outline Plastic surface mounted package; 3 leads SOT23 D B E A X HE vMA 3 Q A A1 1 e1 e bp 2 wMB detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1 OUTLINE VERSION SOT23 REFERENCES IEC JEDEC TO-236AB EIAJ EUROPEAN PROJECTION ISSUE DATE 97-02-28 99-09-13 Fig 13. SOT23. 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 8 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 10. Revision history Table 6: Rev Date 1 20020211 Revision history CPCN Description Product spec; initial version 9397 750 09096 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 9 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET 11. Data sheet status Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Product data Production [1] [2] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 12. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 13. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. 9397 750 09096 Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. Product data Rev. 01 -- 11 February 2002 10 of 11 Philips Semiconductors 2N7002F TrenchMOSTM Logic Level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 (c) Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 11 February 2002 Document order number: 9397 750 09096 |
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